This application claims priority under 35 U.S.C. xc2xa7119 to Japanese patent application No. 11-012478 filed Jan. 20, 1999, the entire contents of which are hereby incorporated by reference;
1. Field of the Invention
The present invention generally relates to a method and apparatus of power saving, and more particularly to a method and apparatus of selectively power saving on a portable information processing apparatus using a built-in battery and an external power source.
2. Discussion of the Background
Recently, an extended data out dynamic random access memory (EDO DRAM) is being replaced to a great extent by a synchronous DRAM to be used as a main memory in a portable information processing apparatus such as for example a note-type PC (personal computer), a PDA (personal digital assistants), or the like. The synchronous DRAM consumes more power than the EDO DRAM but can operate in synchronism with an external clock signal at a frequency of 100 MHz or faster.
Generally, the above-mentioned portable information processing apparatus can selectively use an AC (alternate current) power and a built-in-battery power. In such portable information processing apparatus, the main memory, which is increasingly required to be greater in size, is not always in full-use. For example, in an office environment where AC power is available, the portable information processing apparatus may be put in a place where the main memory can be fully used. However, if the portable information processing apparatus is used outside where the built-in battery can be the only power, an application may not require a mass amount of data. In those instances, it would be desirable for the portable information processing apparatus to not fully use the main memory.
However, in the portable information processing apparatus, the power is generally supplied to all main memory despite the fact that all the main memory is not necessarily used. Accordingly, power is wasted, and battery lifetime expires sooner than necessary. This becomes a problem, in particular, when the synchronous DRAM is used as the main memory since this memory consumes more power than the EDO DRAM.
The present invention provides a novel portable information processing apparatus which includes a memory, an AC/DC converter, a built-in battery, a power source detection mechanism, and a switch. The memory includes a main memory block and a sub memory block. The AC/DC converter converts an AC voltage to a DC voltage which is supplied to the memory. The built-in battery supplies a battery DC voltage which is supplied to the memory. The power source detection mechanism performs a power source detection operation in which a condition as to whether the apparatus operates with converted AC or battery DC voltage. The power source detection mechanism is configured to generate a detection signal when detecting the battery DC voltage. If the switch receives no detection signal from the power source detection mechanism, the switch supplies the converted AC to DC voltage and the battery DC voltage to the main and sub memory blocks. Otherwise, the switch is configured to shut off a supply of the battery DC voltage to the sub memory block of the memory when receiving the detection signal from the power source detection mechanism.
The power source detection mechanism may perform the power source detection operation during a start time of the apparatus. In this case, the switch immediately may act in response to a result of the power source detection operation and maintain its switching condition after the start time.
Further, the present invention provides a novel portable information processing apparatus which includes a memory, a clock generator, an AC/DC converter, a built-in battery, a power source detection mechanism, and a switch. The memory includes a main memory block and a sub memory block. Each of the main and sub memory blocks is configured with a plurality of synchronous DRAMs. The clock generator generates clock signals and is configured to send the clock signals to each of the plurality of synchronous DRAMs of the main and sub memories of the memory. The AC/DC converter converts an AC voltage to a DC voltage which is supplied to the memory. The built-in battery supplies a battery DC voltage which is supplied to the memory. The power source detection mechanism performs a power source detection operation in which a condition as to whether the apparatus operates with the DC voltage or the battery DC voltage is detected. The power source detection mechanism is configured to generate a detection signal when detecting the battery DC voltage. The switch receives the clock signals from the clock generator and supplies the clock signals to the sub memory. The switch is configured to shut off a supply of the clock signals to the sub memory when receiving the detection signal from the power source detection mechanism so that the battery DC voltage is cut off in a circuit of the synchronous DRAMs.
The power source detection mechanism may perform the power source detection operation during a start time of the apparatus. In this case, the switch immediately may act in response to a result of the power source detection operation and maintain its switching condition after the start time.
Further, the present invention provides a novel method of power saving in an information processing apparatus with a main memory block and a sub memory block, an AC/DC converter for converting AC to DC voltage, and a built-in battery. The method steps include performing a power source detection and shutting off a supply of the battery voltage to the sub memory block when it is determined that the apparatus operates with the the battery DC voltage.